000
001
010
100
101
111
000
By inspection, we see that x2 toggles iff x1. x1 is reset iff x1 (on the previous cycle) and is set iff x0 and not x1; we can simplify this to the statement that x1 is toggled iff x0 + x1.
x0 is messier, so let's do the Karnaugh map thing (or this could be done by starting with a sum-of-products analysis, etc):
| x2 \ x1 x0 | 00 | 01 | 11 | 10 |
|---|---|---|---|---|
| 0 | 1 | 0 | dc | 0 |
| 1 | 1 | 1 | 0 | dc |
not(x1) not(x0) + x2 not(x1)
= not(x1) ( not(x0) + x2 )
Since we have an exact expression for x0, we will use a D flip-flop; for x1 and x2, since we have expressions for when they toggle, we will use JK flip-flops.
The clock is not drawn below; it should be wired into the clock input of each flip-flop.
Note how we do not need any separate NOT gates, because the desired complements are already available. If you recall the design of the D and JK flip-flops, you will note that we could not save any of their circuitry in failing to produce these values.