1a.
| a | b | stable state(s) |
|---|---|---|
| 0 | 0 | only P=0 and Q=1 |
| 0 | 1 | P=0 and Q=1; or P=1 and Q=0 |
| 1 | 0 | only P=Q=1 |
| 1 | 1 | none |
1b. To be able to be used as a one-bit data latch, we have to be able to force it into at least two different stable states (in the SR latch, that's Qa=1 and Qb=0 for one stable state, and Qa=0 and Qb=1 for the other), and we have to be able to maintain these both as stable states from some common input pair (in the SR latch, that's Qa=Qb=0).
We do have an input setting which has multiple stable states. However, we can only force the circuit into one of those two states. That is, we can force it to P=0 and Q=1 by supplying a=b=0; but we can't force it to P=1 and Q=0.
So even though there exist two different stable states for one of the input pairs, there's no way to "store" two different possibilities because we can't set it arbitarily to one of those two states.
2.
Here is, I think, the most minimal solution to this problem.
Since the output sequence is of length 7, which is less than 23, there necessarily exists a three-flip-flop solution. At worst you could generate the sequence 0,1,2,3,4,5,6 with the three flip-flops, and then put that into a combinational circuit which transforms each input into its appropriate value which is at that position in the sequence (i.e. 0->0, 1->3, 2->6, etc).
But better yet, we can notice that the sequence 1,2,3,4,5,6,7 is fairly similar to the desired output sequence.
So, first make a three-flip-flop counter which counts 1,2,3,4,5,6,7,repeat, by making the input to the low bit such that it fails to flip when the number is 7 (so that the count goes from 111 to 001 instead of to 000).
Then, convert the output value of 0 to 1, 2 to 3, and 3 to 6, and leave the other four values alone. The following combinational circuit could be derived by Karnaugh maps. The input state of 000 is a "don't care" situation.
Combining these two circuits, we notice an opportunity to collapse two identical AND gates, for our final answer:
3.
This is like a bidirectional shift register.
